A Programmable Logic Device (PLD) is a semiconductor integrated circuit that contains fixed logic circuitry that can be programmed to perform a host of logic functions. In the semiconductor industry, PLDs have become increasingly popular for a number of reasons. Due to advances in chip manufacturing technology, PLDs have improved density and speed performance. Sophisticated programming software enables complex logic functions to be rapidly developed for PLDs. Furthermore, logic designs generally can also be easily migrated from one generation of PLDs to the next, further reducing product development times. The closing of the price-performance gap with Application-Specific Integrated Chips (ASICs) and reduced product development times makes it compelling for many Original Equipment Manufacturers (OEMs) to integrate PLDs into their device designs.
The PLD design process is constantly improved and streamlined. One such improvement involves design tools. Traditionally, a PLD designer describes the logic and functions of a PLD using a hardware description language such as Verilog, VHDL or Abel. Increasingly, the hardware description language (HDL) files are generated by design tools based on inputs from the PLD designer/user. These design tools utilize libraries of IP (intellectual property) cores to build the HDL while still allowing the user to customize the PLD logic. These design tools reduce errors and the amount of time needed to generate an HDL file.